pm_sleep_info_t pm_sleep_info = {
};
pm_sleep_info_t * get_pm_sleep_info(void)
{
pm_sleep_info.sleep_enable = pm_env.sleep_enable;
pm_sleep_info.ultra_sleep_enable = pm_env.ultra_sleep_enable;
pm_sleep_info.min_sleep_time = pm_env.min_sleep_time;
pm_sleep_info.sleep_state = pm_env.sleep_state;
return &pm_sleep_info;
}
typedef struct {
bool sleep_enable;
bool ultra_sleep_enable;
uint16_t min_sleep_time;
volatile uint32_t sleep_state;
} pm_sleep_info_t;
/**
* @brief pmu dump
*
*
* @note
*
* The dump infomation looks like this:
* [PMU] prevent_status=00000000
* [PMU] wakeup_pin=0001000004(cur_level=0001000004 sleep_level=0001000004)
* [PMU] pull_up=FFFD7F9CDF(cur_level=FFFD7F9CDC) pull_down=0000000000(cur_level=0000000000) all_cur_level=FFFFFFFFFC
* [PMU] clocking: CPU(32MHz) SF0 SF1 UART0 GPIO ANA
*
* Explain:
* 1st line:
* Something (peripheral, user...) prevent system sleep.
* bitmask reference @ref pm_id_t
* 2nd line:
* Bitmask of wakeup pin.
* If cur_level != sleep_level, system can't sleep.
* 3rd line:
* Inside pull-up and pull-down status.
* if pull_up is not equal to it's cur_level, symtem has current leakage in sleep.
* if pull_down's cur_level is not equal to 0, system has current leakage in sleep.
* 4th line:
* Working modules.
* peripheral: powered block, the more block are powered on, the greater the current consumption during sleep.
**/
void drv_pmu_dump(void)
{
uint32_t gpio0_wake_en_mask = OM_PMU->GPIO_WAKEUP[0];
uint32_t gpio0_current_level_mask = OM_GPIO0->DATA;
uint32_t gpio0_wakeup_level_mask = OM_PMU->GPIO_POL;
uint32_t gpio0_pull_up_mask = OM_PMU->GPIO_PU_EN;
uint32_t gpio0_pull_down_mask = OM_PMU->GPIO_PD_CTRL;
uint32_t gpio1_wake_en_mask = OM_PMU->GPIO_WAKEUP[1];
uint32_t gpio1_current_level_mask = OM_GPIO1->DATA;
uint32_t gpio1_wakeup_level_mask = OM_PMU->GPIO_POL_1;
uint32_t gpio1_pull_up_mask = OM_PMU->GPIO_PU_EN_1;
uint32_t gpio1_pull_down_mask = OM_PMU->GPIO_PD_CTRL_1;
pm_sleep_info_t * get_pm_sleep_info(void);
pm_sleep_info_t *pm_sleep_info_temp = get_pm_sleep_info();
LOG_INF("sleep_enable is %s\n",pm_sleep_info_temp->sleep_enable?"true":"false");
LOG_INF("ultra_sleep_enable is %s\n",pm_sleep_info_temp->ultra_sleep_enable?"true":"false");
LOG_INF("min_sleep_time is %d ms\n", pm_sleep_info_temp->min_sleep_time);
LOG_INF("prevent sleep reason is 0x%08x, if reason is not 0, you can look pm_id_t enum\n", pm_sleep_info_temp->sleep_state);
// GPIO0 GROUP wakeup pin
LOG_INF("[PMU] GPIO0 GROUP wakeup pin: 0x%08X(cur_level: 0x%08X sleep_level: 0x%08X)\n",
gpio0_wake_en_mask, gpio0_wake_en_mask & gpio0_current_level_mask, gpio0_wakeup_level_mask);
// GPIO0 GROUP pull status
LOG_INF("[PMU] GPIO0 GROUP pull up: 0x%08X(cur_level:0x%08X) pull down: 0x%08X(cur_level:0x%08X) all cur_level: 0x%08X\n",
gpio0_pull_up_mask, gpio0_pull_up_mask & gpio0_current_level_mask, gpio0_pull_down_mask, gpio0_pull_down_mask & gpio0_current_level_mask, gpio0_current_level_mask);
// GPIO1 GROUP wakeup pin
LOG_INF("[PMU] GPIO1 GROUP wakeup pin: 0x%08X(cur_level: 0x%08X sleep_level: 0x%08X)\n",
gpio1_wake_en_mask, gpio1_wake_en_mask & gpio1_current_level_mask, gpio1_wakeup_level_mask);
// GPIO1 GROUP pull status
LOG_INF("[PMU] GPIO1 GROUP pull up: 0x%08X(cur_level:0x%08X) pull down: 0x%08X(cur_level:0x%08X) all cur_level: 0x%08X\n",
gpio1_pull_up_mask, gpio1_pull_up_mask & gpio1_current_level_mask, gpio1_pull_down_mask, gpio1_pull_down_mask & gpio1_current_level_mask, gpio1_current_level_mask);
// cpu clock
LOG_INF("[PMU] clocking CPU[%dMHZ]\n", drv_rcc_clock_get(RCC_CLK_CPU) / 1000000);
// peripherals clock
if (!(OM_CPM->SF0_CFG & CPM_SF_CFG_GATE_EN_MASK)) {
LOG_INF(" SF");
}
if (!(OM_CPM->TIM0_CFG & CPM_TIM_CFG_GATE_EN_MASK)) {
LOG_INF(" TIM0");
}
if (!(OM_CPM->TIM1_CFG & CPM_TIM_CFG_GATE_EN_MASK)) {
LOG_INF(" TIM1");
}
if (!(OM_CPM-> TIM2_CFG & CPM_TIM_CFG_GATE_EN_MASK)) {
LOG_INF(" TIM2");
}
if (!(OM_CPM->UART0_CFG & CPM_UART_CFG_GATE_EN_MASK)) {
LOG_INF(" UART0");
}
if (!(OM_CPM->UART1_CFG & CPM_UART_CFG_GATE_EN_MASK)) {
LOG_INF(" UART1");
}
if (!(OM_CPM->UART2_CFG & CPM_UART_CFG_GATE_EN_MASK)) {
LOG_INF(" UART2");
}
if (!(OM_CPM->I2C0_CFG & CPM_I2C_CFG_GATE_EN_MASK)) {
LOG_INF(" I2C0");
}
if (!(OM_CPM->I2C1_CFG & CPM_I2C_CFG_GATE_EN_MASK)) {
LOG_INF(" I2C1");
}
if (!(OM_PMU->BASIC & PMU_BASIC_LPTIM_32K_CLK_GATE_MASK)) {
LOG_INF(" LPTIM");
}
if (!(OM_CPM->BLE_CFG & CPM_BLE_CFG_BLE_AHB_GATE_EN_MASK)) {
LOG_INF(" BLE");
}
if (!(OM_CPM->GPDMA_CFG & CPM_GPDMA_CFG_GATE_EN_MASK)) {
LOG_INF(" DMA");
}
if (OM_CPM->AES_CFG & CPM_AES_CFG_CLK_EN_MASK) {
LOG_INF(" AES");
}
if (!(OM_CPM->GPIO_CFG & CPM_GPIO_CFG_GATE_EN_MASK)) {
LOG_INF(" GPIO0");
}
if (!(OM_CPM->PHY_CFG & CPM_PHY_CFG_APB_GATE_EN_MASK)) {
LOG_INF(" PHY");
}
if (!(OM_CPM->RNG_CFG & CPM_RNG_CFG_GATE_EN_MASK)) {
LOG_INF(" RNG");
}
if (!(OM_CPM->MAC_24G_CFG & CPM_2P4_CFG_MAC_GATE_EN_MASK)) {
LOG_INF(" 2.4G");
}
if (!(OM_CPM->ANA_IF_CFG & CPM_ANA_IF_CFG_GATE_EN_MASK)) {
LOG_INF(" DAIF");
}
if (!(OM_CPM->EFUSE_CFG & CPM_EFUSE_CFG_GATE_EN_MASK)) {
LOG_INF(" EFUSE");
}
if (!(OM_CPM->SPI0_CFG & CPM_SPI_CFG_GATE_EN_MASK)) {
LOG_INF(" SPI0");
}
if (!(OM_CPM->SPI1_CFG & CPM_SPI_CFG_GATE_EN_MASK)) {
LOG_INF(" SPI1");
}
if (!(OM_CPM->APB_CFG & CPM_APB_CFG_RTC_APB_GATE_EN_MASK)) {
LOG_INF(" RTC");
}
LOG_INF("\n");
}注意：新加函数，客户需要把对应的打印接口换成自己的打印接口函数 |